During manufacturing of memory systems, defects may occur on the memory dies that render certain groups of adjacent bit lines unusable or at least with less reliability. These defects may be detected as part of the manufacturing process, and either replaced using redundant replacement bit lines, or, if the numbers of defective bit lines are too numerous, then the memory die is placed into a lower quality tier or discarded completely.
However, defects may occur in the memory dies after manufacturing, such as due to use of the memory device in its normal operation mode as its programs data into, reads data from, and erases data from the memory cells of the memory dies. These defects, not detected during manufacturing, are referred to as grown defects. Because these defects were not detected during manufacturing, the memory system is not pre-programmed with knowledge of these defective storage locations. In turn, when a controller of the memory system reads data from the defective storage locations, it assumes that the storage locations do not have defects and instead are reliable. Consequently, during a read operation when the controller performs error correction on the bits, the controller may assume a high likelihood of reliability of the bit values of the bits, even though in actuality the bits are stored in defective storage locations. In turn, the controller may fail or struggle to complete error correction.
One reason that the controller may fail or struggle to complete error correction is that the soft bits that the controller uses to identify likelihoods of reliability are not informative for bits stored in defective storage locations, since such bits may have a substantially low chance of having correct bit values. Another reason is that some error correction codes used to generate the parity bits have a relatively high degree of sensitivity to collections of consecutive or bursts of bits. Consequently, if a plurality of adjacent bit lines or memory cells are defective, such as due to grown defects. the errors of the bits stored in the defective memory cells may have a pattern of data values that aligns with the code structure of the error correction code, creating a weakness in the error correction code. Accordingly, ways to detect unreliable bits or unreliable memory components used to program and read the bits to/from the memory dies, including bits and/or memory components that are unreliable due to grown defects, may be desirable.